NXP Adopts Veloce Platform for HDT and Set-Top-Box Chip Sets

NXP has announced that they have adopted Mentor Graphics’ Veloce platform for the complete system-level verification of its next generation of digital Systems-on-Chip (SoC) for High-Definition TV (HDTV) and Set-Top-Box (STB). NXP chose Veloce due to its superior debug capabilities, performance, accuracy, and extensive portfolio of iSolve vertical market solutions for the verification of digital standards associated with HDTV and STB.

“NXP continues to drive system-level integration to provide advanced solutions to our customer,” said Shanthi Padmanabhan, vice president and innovation and technology manager of the home business unit, NXP Semiconductors. “Pre- and post-silicon testing of our SoCs requires a massive number of verification cycles to validate functionality and avoid design flaws. The use of Veloce for hardware-assisted verification has played an important role for NXP to achieve high speed verification and testing required. This ultimately enables us to beat our tight schedules in a highly competitive market. NXP is the first to introduce a global single chip digital TV platform on 45nm, TV550, which enables high-end TV features in mainstream TVs.”

The Veloce platform is the industry’s fastest dual-mode Accelerator/Emulator available, providing MHz performance for both transaction-based verification and traditional in-circuit emulation (ICE). With an extensive portfolio of vertical market solutions, the Veloce platform is the platform of choice for multimedia, networking, wireless, and embedded systems applications.

(Source) Press